Difference between revisions of "CAEN VX1190A TDC"
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+ | =Data Record= | ||
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+ | 0x400083a8 = 1000000000000001000001110101000 | ||
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+ | 0x400083c8 = 1000000000000001000001111001000 | ||
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+ | 0x400083e8=1000000000000001000001111101000 | ||
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[[VME_modules]] | [[VME_modules]] |
Revision as of 22:13, 15 October 2012
CAEN VX1190A multihit TDC, 96 channels
User Manual
File:VX1190A UserManualRev13.pdf
Addressing
From the picture and the above diagram it looks like the module is at the following settings
<bits 19-16>=0x01
<bits 23-20>=0x02
<bits 27-24>=0x08
<bits 31-29>=0x00
ROL initializing
# Address for TDC CAEN 1190 const NC1190 = 1 const C1190_ADDR = 0x210000 const C1190_OFFSET = 0x10000 # Maximum number of 32bit words from C1190 const C1190_MAX_DATA = 128 const C1190_BLOCK_READ = 1 # Note that C1190_ADDR must be A32 for 2eSST, A24 okay for BLT/MBLT tdc1190Init(C1190_ADDR,C1190_OFFSET,NC1190,1); tdc1190SetTriggerMatchingMode(i); tdc1190SetEdgeResolution(i,100); tdc1190EventFifo(i,0); /* Must be enabled(disabled) for Linked List (direct) DMA */ tdc1190SetBLTEventNumber(i,C1190_BLOCK_READ);
output from ROC_CODA when after download
Initialized TDC ID 0 at address 0xa6b79000 tdc1190SetEdgeResolution(0): Set Edge Resolution to 100 ps
Errors
invalid event pointer
tdc1190ReadBlock: ERROR in DMA transfer Initialization 0xffffffff jlabgefDmaSend: ERROR: the_event pointer is invalid!
gen_int_list.crl
# # General User readout list # # David Abbott, TJNAF 2000 readout list GEN_USER maximum 1024,512 general readout # A16 Address for SIS3610 Module const TRIG_ADDR=0x3800 # Address for TDC CAEN 1190 const NC1190 = 1 const C1190_ADDR = 0x210000 const C1190_OFFSET = 0x10000 # Maximum number of 32bit words from C1190 const C1190_MAX_DATA = 128 const C1190_BLOCK_READ = 1 # Note that C1190_ADDR must be A32 for 2eSST, A24 okay for BLT/MBLT extern int bigendian_out; begin download variable res, i vmeOpenDefaultWindows(); s3610Init(TRIG_ADDR,0,0); # When sending to a Linux Host set bigendian_out = 0 bigendian_out = 1; log inform "Initializing TDC 1190" # SETUP caen1190 %% tdc1190Init(C1190_ADDR,C1190_OFFSET,NC1190,1); tdc1190SetTriggerMatchingMode(0); tdc1190SetEdgeResolution(0,100); tdc1190EventFifo(0,0); /* Must be enabled(disabled) for Linked List (direct) DMA */ tdc1190SetBLTEventNumber(0,C1190_BLOCK_READ); tdc1190BusError(0,C1190_BLOCK_READ); /* 1: BERR/2eTERM for block reads (DMA), 0 for SCT */ /* tdc1190SetWindowWidth(0,51176); */ /* tdc1190SetWindowOffset(0,-800001); */ %% log inform "User Download Executed" end download begin prestart variable jj, adc_id log inform "Entering User Prestart" init trig source GEN link async trig source GEN 1 to usrtrig and usrtrig_done event type 1 then read GEN 1 %% tdc1190Status(0); %% log inform "User Prestart Executed" end prestart begin end CDODISABLE(GEN,1,1); log inform "User End Executed" end end begin pause CDODISABLE(GEN,1,1); log inform "User Pause Executed" end pause begin go log inform "Entering User Go" CDOENABLE(GEN,1,1); end go begin trigger usrtrig variable ii, event_ty, event_no, datascan, imod, nwrds variable evStored rol->dabufp = (long *) 0; open event type EVTYPE of BT_UI4 %% /* Check for valid data here */ for(ii=0;ii<100;ii++) { datascan = tdc1190Dready(0); if (datascan>0) { break; } } if(datascan>0) { // Get the TDC data from all modules... rflag=1 block read, 0 for SCT for(imod=0;imod<1;imod++) { nwrds = tdc1190ReadBlock(imod,rol->dabufp,C1190_MAX_DATA,C1190_BLOCK_READ); if(nwrds < 0) { logMsg("ERROR: in transfer (event = %d), status = 0x%x\n", event_no,nwrds); *rol->dabufp++ = 0xda000bad; } else { rol->dabufp += nwrds; } } } else { evStored = tdc1190GetEventStored(0); logMsg("ERROR: Data not ready in event %d evStored = %d\n",event_no,evStored); *rol->dabufp++ = 0xda000bad; } %% close event end trigger begin done usrtrig end done begin done # Re-enable Trigger Source here s3610IntAck(1); end done begin status end status
Data Record
0x400083a8 = 1000000000000001000001110101000
0x400083c8 = 1000000000000001000001111001000
0x400083e8=1000000000000001000001111101000