Difference between revisions of "VFAT readout electronics"
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== [http://totem.web.cern.ch/Totem/work_dir/electronics/totelwork_files/PDFgeneral/VFAT2Manual.pdf VFAT Board specifications]== | == [http://totem.web.cern.ch/Totem/work_dir/electronics/totelwork_files/PDFgeneral/VFAT2Manual.pdf VFAT Board specifications]== | ||
Photos of the top and bottom side of the VFAT card are shown below. The top side has a 50 pin connector which goes to the breakout box to separate I2C control signals and LVDS data I/O signals. The bottom side attaches to the GEM detector readout board via a 130 pin header connector.<br> | Photos of the top and bottom side of the VFAT card are shown below. The top side has a 50 pin connector which goes to the breakout box to separate I2C control signals and LVDS data I/O signals. The bottom side attaches to the GEM detector readout board via a 130 pin header connector.<br> |
Revision as of 15:58, 28 August 2008
This page describes the GEM detector readout system for the Qweak experiment. The system has four components, the VFAT readout card from CERN, a signal breakout box, a Gumstick I2C control computer, and an I/O VME module to record the LVDS output from the VFAT card.
VFAT readout Block Diagram
The diagram below describes the detector readout electronics for a GEM detector instrumented with 6 VFAT boards. Each VFAT board has 128 radout channels which are output through a single LVDS data line in series. A VFAT board from CERN is evaluated for use as a readout board to convert the GEM output analog signal to a digital signal.
Media:BreakOutBox.text
Target View:
- Dimensions:
- Width: 7.5"
- Height: 4.5"
VFAT Board specifications
Photos of the top and bottom side of the VFAT card are shown below. The top side has a 50 pin connector which goes to the breakout box to separate I2C control signals and LVDS data I/O signals. The bottom side attaches to the GEM detector readout board via a 130 pin header connector.
- 40 MHz sampling
- 128 channels
- can store up to 128 triggered events
- 0.25 m CMOS
- designed to withstand 100 MRad
- Single Event Upset protection using triple logic flip flops testable via a scan chain
- I2C control
- LVDS output
Signals
LVDS Signals to I/O module using 34 pin ribbon cable
National Semiconductor LVDS site
LVDS signals should be able to go 10 m
Media:Image:LVDS_EvaluationKit.pdf
[National Semiconductor suggests 15 m in section 2.5]
change to CAT 5 cable and you may be able to hit 80 m for 40 Mb/s
I2C signals
I2C (Can travel 8 m)
Breakout box specs (preliminary)
The breakoutbox is a circuit board with no active elements that separates the I2C command signal lines from the LVDS data I/O lines. The box is designed to support 6 VFAT readout cards. The box is being designed to be mounted on the detector rotator. All 6 VFAT cards will have their signal lines go into the break out box. The I2C lines will then go our of the breakout box along an RJ45 standard ethernet cable. The LVDS lines will exit though a standard 34 pin ribbon cable(Connector type Robinson Nugent P50E-068-P1-SR1-TG).
- 6 inputs for ~1m ribbon cables from VFAT modules
- 3-bit DIP switch to select I2C address range for each VFAT
- Soft reset for each VFAT controlled via I2C expander chip
- Shared hard reset line from Gumstix
- Scan Mode switch
- ScanIn connector (cascaded)
- ScanOut connector (cascaded)
- RJ45 port to gumstix box containing I2C and other signals:
- Power (3.3 or 2.5V)
- Ground
- SDA
- SCL
- Hard Reset
- Extra line for Link detection
- 34 pin ribbon connector for LVDS signals
- LEMO connector for LVDS trigger input
- LEMO connector for LVDS Master Clock
- I2C expander(s) for status LEDs (socketed)
- Status LEDs:
- Power (from I2C line)
- I2C connect (flashing through I2C expand)
- Power for each VFAT (feedback through common pins on VFAT board?)
- Hard Reset LED
- Clear UpsetReg (SEU counter) via I2C expand
Ribbon cable pinouts
# | VFAT pin # |
Name | Value | Test rig color Primary/Second |
B1 | DGND | Digital Ground | Black/Grey (shared) | |
A1 | DVDD | +2.5V | Red/Grey (shared) | |
B2 | 168 | SDA | I2C Data | Green/Yellow |
A2 | 167 | SCL | I2C Clock | Yellow/Green |
B3 | DGND | Digital Ground | Black/Grey (shared) | |
A3 | DVDD | +2.5V | Red/Grey (shared) | |
B4 | 162 | DACo-V | DAC output Volt | |
A4 | 163 | DACo-I | DAC output Current | |
B5 | 164 | I2C ADDR 2 | I2C Address Most | White/Blue |
A5 | 165 | I2C ADDR 1 | I2C Address Middle | White/Orange |
B6 | 166 | I2C ADDR 0 | I2C Address Least | White/Green |
A6 | 169 | REsB | Soft Reset (Program saved) | White/Grey |
B7 | 170 | ForceRehOff | ?? bond to grnd | |
A7 | 171 | REhB | Hard Reset | Grey/White |
B8 | 173 | MCLKB (-) | Orange/Purple | |
A8 | 174 | MCLK (+) | Purple/Orange | |
B9 | 175 | T1B (-) | Green/Purple | |
A9 | 176 | T1 (+) | Purple/Green | |
B10 | 177 | ScanOut | Brown/Purple | |
A10 | 178 | ScanIn | Purple/Brown | |
B11 | 180 | DataValidB (-) | Grey/Purple | |
A11 | 181 | DavaValid (+) | Purple/Grey | |
B12 | 182 | DataOutB (-) | Blue/Black | |
A12 | 183 | DataOut (+) | Black/Blue | |
B13 | 184 | SB8 (-) | Orange/Black | |
A13 | 185 | S8 (+) | Black/Orange | |
B14 | 186 | SB7 (-) | Green/Red | |
A14 | 187 | S7 (+) | Red/Green | |
B15 | 188 | SB6 (-) | Orange/Red | |
A15 | 189 | S6 (+) | Red/Orange | |
B16 | 190 | SB5 (-) | Blue/Red | |
A16 | 191 | S5 (+) | Red/Blue | |
B17 | 192 | SB4 (-) | Grey/Yellow | |
A17 | 193 | S4 (+) | Yellow/Grey | |
B18 | 194 | SB3 (-) | Brown/Yellow | |
A18 | 195 | S3 (+) | Yellow/Brown | |
B19 | 196 | SB2 (-) | Orange/Yellow | |
A19 | 197 | S2 (+) | Yellow/Orange | |
B20 | 198 | SB1 (-) | Blue/Yellow | |
A20 | 199 | S1 (+) | Yellow/Blue | |
B21 | DGND | Digital Ground | ||
A21 | DVDD | +2.5V | ||
B22 | DGND | Digital Ground | ||
A22 | 179 | ScanEn | Scan Mode Enable | |
B23 | AGND | Analog Ground | ||
A23 | AVDD | 2.5V | Grey/Red | |
B24 | AGND | Analog Ground | ||
A24 | AVDD | 2.5V | Grey/Red | |
B25 | AGNDD | Analog Ground | Grey/Black | |
A25 | AVDD | 2.5V | Grey/Red |
The PC board-mount socket for the cable is ERNI 154765 for reel or ERNI 063197 for tube packaging.
The cable crimp-ons are ERNI 024403 or premade cables 300mm long are ERNI 173795
DF test Pattern
Gumstick I2C controller
The gumstix motherboard used is the verdex XL6P. It has a 600MHz Marvell XScale processor, 128MB of RAM, and 32MB of flash.
More information: Gumstix
Web Interface
The I2C commands from the Gumstick to the VFAT board may be controlled through the web interface (if it is turned on)
Flipbit command interface
Once logged into the Gumstix, I2C registers on the VFAT can be modified using the flipbit interface. The flipbit.arm program takes input on standard input as shown in the following example:
echo p 41 2 on | flip bit
Field 1:
- "p" is for primary register.
- "e" is for extended register.
Field 2:
- if "p" i2c address of the register to be modified. Must be between 0 and 128 inclusive
- if "e" the value of the extended register to modify. Must be between 0 and 256 inclusive
Field 3:
- the bit (counting from 0=least significant) to modify. Must be between 0 and 7 inclusive
Field 4:
- "on" turn the bit on.
- "off" turn the bit off.
- "flip" flip the bit. (on if it was off, off if it was on)
Using standard input allows commands to be chained. The following example toggles bits 6 and 7 of address 64:
echo "p 64 7 flip p 64 6 flip" | flipbit.arm
If a # is used at the beginning of a line or after the standard arguments, the rest of the line is ignored. This is helpful when commands are stored in a file for later. Contents of an example cal.fb file:
#Turns on common calibration settings #toggle calmode registers p 64 6 flip #CalMode<0> p 64 7 flip #CalMode<1> #switch a few channels into calibration mode e 2 7 on #channel 2 e 3 7 on #channel 3
Using that cal.fb file:
# flipbit.arm < cal.fb Using mode p Using address 64 Using bit 6 Using action flip Using mode p Using address 64 Using bit 7 Using action flip Using mode e Using address 2 Using bit 7 Using action on Using mode e Using address 3 Using bit 7 Using action on