Difference between revisions of "CAEN V488 TDC"
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[[File:CAEN_V488_TDC_Manual.pdf]] | [[File:CAEN_V488_TDC_Manual.pdf]] | ||
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|SW 4 || 0 | |SW 4 || 0 | ||
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| + | =ROC library= | ||
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| + | ==Compiling library== | ||
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= initialize TDC= | = initialize TDC= | ||
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=Common Start/Stop= | =Common Start/Stop= | ||
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[[VME_modules]] | [[VME_modules]] | ||
Revision as of 23:21, 24 November 2014
The 12 bit ADC conversion time is 5.7 s. A sliding scale technique is used to reduce differential nonlinearity by injecting an offset. This reduces the dynamic range to 0 3840. ADC values between 3841 and 4095 indicate an error.
The TDC measures the time interval between the falling ECL inputs to the start/stop and the channel.
You can change the dynamic range of the TDC by setting bits using the library function c775setFSR.
| Address | |
| Pin | Setting |
| SW 1 | 2 |
| SW 2 | 2 |
| SW 3 | 0 |
| SW 4 | 0 |
ROC library
Compiling library
initialize TDC
-> c775Init(0x610000) Initialized TDC ID 0 at address 0x90610000