Difference between revisions of "Readout Electronics"
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:180 bits of data = 12 bits Bunch Counter ( =31 MHz clock) + 12 bit (Event Counter + flags) + 12 bits (Chip ID) + 128 bits (data) + 16 bits (Checksum) | :180 bits of data = 12 bits Bunch Counter ( =31 MHz clock) + 12 bit (Event Counter + flags) + 12 bits (Chip ID) + 128 bits (data) + 16 bits (Checksum) | ||
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| + | :The input register has been set to a size of 256 bit and there are 12 of them | ||
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Timing: | Timing: | ||
Revision as of 22:16, 14 January 2008
Inputs to breakout box
- Trigger (LVDS)
- Clock ( RF synced pulse 31 MHz = 499/16 MHz, LVDS)
- Flip Flop scaner (1 TTL pulse)
V1495 :
- 28 Pin output on 34 pin ribbon cables
- Inputs to V1495:
- 180 bits of data = 12 bits Bunch Counter ( =31 MHz clock) + 12 bit (Event Counter + flags) + 12 bits (Chip ID) + 128 bits (data) + 16 bits (Checksum)
- The input register has been set to a size of 256 bit and there are 12 of them
Timing:
- VFAT:
- Progammable through the Latency register (8 bits = 256 bits) you have but only 128 registers data registers. We can go back in time 100 *32 ns = 3 micro seconds. But we only may need 100 ns.
V1495: can have programmable delay up to?
We can program delays and play with the timing by downloading values for "lat" into the VFAT extended register and set delay on the V1495 through the ROC.