Difference between revisions of "Host Computer Configuration"
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[http://www.slac.stanford.edu/grp/lcls/controls/global/standards/hardware/v6100a_ih.pdf Information below is Table 5-11 pg 92 of this reference] | [http://www.slac.stanford.edu/grp/lcls/controls/global/standards/hardware/v6100a_ih.pdf Information below is Table 5-11 pg 92 of this reference] | ||
{| border="1" | {| border="1" | ||
| − | + | | ROC Pin# || DB9 Pin # || Signal | |
| − | | Pin # | ||
|- | |- | ||
| − | | 1 | + | | 1 || 1 || DCD (Carrier Detect) |
|- | |- | ||
| − | | 2 | + | | 2 || 7 || RTS (Request to Send) |
|- | |- | ||
| − | | 3 | + | | 3 || 5 || GNDC |
|- | |- | ||
| − | | 4 | + | | 4 || 3 || TX (Transmit) |
|- | |- | ||
| − | | 5 | + | | 5 || 2 || RX (Recieve) |
|- | |- | ||
| − | | 6 | + | | 6 || 5 || GNDC |
|- | |- | ||
| − | | 7 | + | | 7 || 8 || CTS (Clear to Send) |
|- | |- | ||
| − | | 8 | + | | 8 || 4 || DTR (Data Terminal Ready) |
|} | |} | ||
Revision as of 00:33, 14 August 2007
MVME 6100
ROC1 ethernet address: 0001AF1998B5
ROC1 ethernet address: 0001AF1998B6
MPC7457 RISC G4 processor (PPC family)
Debug Connector Pinouts
Information below is Table 5-11 pg 92 of this reference
| ROC Pin# | DB9 Pin # | Signal |
| 1 | 1 | DCD (Carrier Detect) |
| 2 | 7 | RTS (Request to Send) |
| 3 | 5 | GNDC |
| 4 | 3 | TX (Transmit) |
| 5 | 2 | RX (Recieve) |
| 6 | 5 | GNDC |
| 7 | 8 | CTS (Clear to Send) |
| 8 | 4 | DTR (Data Terminal Ready) |