CH HPGe Electronics Chain

From New IAC Wiki
Revision as of 20:38, 23 January 2022 by Harpconn (talk | contribs)
Jump to navigation Jump to search

HPGe → Split signal using BNC T junction

→ First line to spec amp -> peak sensing ADC

→ Second line to timing/filter amp with ~2.3x amplification (also inverts)

→ Discriminator (Blue lecroy model #xxxx)

→ Top of dual timer then into bottom of dual timer

→ Into 1st gate and delay generator

--> positive sent to second gate and delay module

--> negative sent to PADC as gate for spec amp signal

→ 2nd gate and delay generator used for ROC signal





=Previous Page]]

CaGaS Phase II

PAS Feasibility Study Runs