Difference between revisions of "CAEN V1495 IO"

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== probing memory==
 
== probing memory==
 +
  I set the switches as follows
 +
 +
  sw3  sw4  sw7  sw8
 +
    0    8    1    1
 +
 +
 +
And the following is a printout of my board:
 +
(0x80118000 - A32    0x90118000 - A24)
 +
 +
 +
-> m 0x80118000
 +
80118000:  0000-
 +
80118002:  0000-
 +
80118004:  0000-
 +
80118006:  00dd-
 +
80118008:  001f-
 +
8011800a:  ffff-
 +
8011800c:  0002-
 +
8011800e:  0001-
 +
80118010:  00ff-
 +
80118012:  0001-
 +
80118014:  00ff-
 +
80118016:  0001-
 +
80118018:  0000-
 +
8011801a:  ffff-.
 +
 +
value = 1 = 0x1
 +
-> m 0x90118000
 +
90118000:  0000-
 +
90118002:  0000-
 +
90118004:  0000-
 +
90118006:  00dd-
 +
90118008:  001f-
 +
9011800a:  ffff-
 +
9011800c:  0002-
 +
9011800e:  0001-
 +
90118010:  00ff-
 +
90118012:  0001-
 +
90118014:  00ff-
 +
90118016:  0001-
 +
90118018:  0000-
 +
9011801a:  ffff-.
 +
 +
value = 1 = 0x1
 +
->
  
 
= Download Firmware=
 
= Download Firmware=

Revision as of 18:15, 5 May 2009

Manual

Media:CAEN_V1495_Manual_Rev6.pdf

Readout code

V1

The ZIP file below contains the HDL source code to download into the V1495

http://www.physics.isu.edu/~tforest/DAQ/GEMReadout_V1495Source_Rev1_0.zip

The ZIP file below contains the ROC library

http://www.physics.isu.edu/~tforest/DAQ/GEMReadout_VxWorkxSource_11_26_2008.zip


ROC lib

compile library

To compile the ROC library I executed the following command within the subdirectory containing the v1495.c file

ccppc  -fno-builtin -fno-for-scope -fstrength-reduce -mlongcall -mcpu=604 -DCPU=PPC604 -DVXWORKS -D_GNU_TOOL -DVXWORKSPPC -I/usr/local/coda/2.5/common/include/ -I../h -c -o v1495Lib.o -i v1495.c


load library onto the ROC

I then copies the library v1495Lib.o into my ROC library subdirectory which is where the ROC is pooing at boot up

/home/daq/CODA/ROClibs/libs

I loaded the library by hand by typing the following at the ROC console

-> ld < v1495Lib.o
value = 268430512 = 0xfffecb0

Setting address

The address pins on this module are not labeled so I adopted the convention of numbering them from left to right as I look from the front pannel.

400 px

Address
Pin Setting
SW 3 3
SW 4 2
SW 7 1
SW 8 1


probing memory

 I set the switches as follows
  sw3  sw4  sw7  sw8
   0    8    1    1


And the following is a printout of my board: (0x80118000 - A32 0x90118000 - A24)


-> m 0x80118000 80118000: 0000- 80118002: 0000- 80118004: 0000- 80118006: 00dd- 80118008: 001f- 8011800a: ffff- 8011800c: 0002- 8011800e: 0001- 80118010: 00ff- 80118012: 0001- 80118014: 00ff- 80118016: 0001- 80118018: 0000- 8011801a: ffff-.

value = 1 = 0x1 -> m 0x90118000 90118000: 0000- 90118002: 0000- 90118004: 0000- 90118006: 00dd- 90118008: 001f- 9011800a: ffff- 9011800c: 0002- 9011800e: 0001- 90118010: 00ff- 90118012: 0001- 90118014: 00ff- 90118016: 0001- 90118018: 0000- 9011801a: ffff-.

value = 1 = 0x1 ->

Download Firmware

v1495firmware(0xfa510000,"GEMReadout.rbf",0,0)


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