Difference between revisions of "A W CAA apparatus"

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Operating voltage: 4600 V
 
Operating voltage: 4600 V
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A high-purity germanium (HpGe) detector is the first of two detectors used in for our coincidence set-up. HpGe detectors have higher energy resolution that allow us to better distinguish energy peaks. We used the IAC's Ortec p-type germanium model SGD-GEM-50180P-S with an active crystal diameter of 65 mm. We operated the detector at its bias voltage of 4600 V, which was controlled by computer software. In order to reduce thermal excitations of valence electrons so only a gamma ray interaction are detected the detector must be cooled to liquid nitrogen temperatures. The detector therefore attached to a dewar as shown in figureXX.YY below.
  
 
[[File:HpGe_Detector_Diagram.png || 200 px]] [[File:IAC_HpGe_DetectorB.png || 200 px]]
 
[[File:HpGe_Detector_Diagram.png || 200 px]] [[File:IAC_HpGe_DetectorB.png || 200 px]]

Revision as of 17:12, 16 October 2014

Detectors

HpGe

Type (npn or pnp): Ortec

Model #: SGD-GEM-50180P-S

Crystal dimensions: active diameter 65 mm (6.5 cm)

Operating voltage: 4600 V


A high-purity germanium (HpGe) detector is the first of two detectors used in for our coincidence set-up. HpGe detectors have higher energy resolution that allow us to better distinguish energy peaks. We used the IAC's Ortec p-type germanium model SGD-GEM-50180P-S with an active crystal diameter of 65 mm. We operated the detector at its bias voltage of 4600 V, which was controlled by computer software. In order to reduce thermal excitations of valence electrons so only a gamma ray interaction are detected the detector must be cooled to liquid nitrogen temperatures. The detector therefore attached to a dewar as shown in figureXX.YY below.

HpGe Detector Diagram.png IAC HpGe DetectorB.png

HpGe Setup Diagram.png IAC HpGe DetectorB DewarStand.png

NaI

Type: Bicron

Model #: 3M3/3

Crystal dimensions: [math]3 \times 3[/math] inches ([math]7.62 \times 7.62[/math] cm)

Operating voltage: -1000 V


SAINT-GOBAIN 3M33.png

IAC NaI Detectors and Parts 7.png NaI-3.png

Geometry

Samples were positioned on top of polyethylene blocks. Polyethylene replaced cement blocks to reduce the background. The HpGe detector was suspended from a dewar 9.5 cm above the sample. The NaI detector is perpendicular to the HpGe detector and 6.7 cm from the sample. The NaI detector was shielded using two standard Pb bricks. A drawing of the apparatus is shown in Figure XX.YY.

DetectorGeo picture.png

Signal Processing

Analog amplification

Discrimination

Signal Trigger logic

Insert you paragraphs describing the apparatus


NaI HpGe RAW Coin 3 4 2014.png

NaI HpGe RAW Coin 3 4 2014 zoomed.png


NaI HpGe DFD to TDC Coin 3 4 2014.png


HpGe DFD to TDC Coin 3 4 2014.png


HpGe TDCstop.png


HpGe Trig.png


Detector Diagram 7.png

Signal Diagram 3.png

The coincidence counting set-up and modules path are as follows. A source is set atop a base constructed of hydrogen dense blocks. These were chosen to reduce the number of background energy spikes detected. The source is placed an equal distance from decorator A and detector B.

Detector A is positioned directly above the source. A high-purity germanium detector is being utilized for this set-up. The one outgoing signal enters a ORTEC 673 Spectroscopy Amplifier and the outgoing signal then passes through a CANBERRA CFD 2035A. The signal can then enter an optional CAEN CFD to produce a time delay, or can pass directly into a channel (1) of the Level Translator. The second outgoing signal from the Spec Amp goes to a peak sensing CAEN V785N. The output from this module goes to the DAQ.

Perpendicular from detector A and placed an equal distance from the source is detector B. This detector can either be a NaI-3 or a germanium detector depending on the source being counted. Detector B’s signal goes to a Post Amplifier and one outgoing signal goes to the above mentioned CAEN V785N and also to the DAQ. The second signal enters a CANBERRA CFD 2035A. The outgoing signal goes to a different channel (4) of the same Level Translator. A ribbon cable on the Level Translator module goes to a Time-to-Digital Converter (TDC) CAEN V775 that is operating in common start mode.

Both channels (1 and 4) of the Level Translator outgoing signal pass to a 3-fold Logic Unit which is used in both OR mode and AND mode to see coincidence lines. This data is collected in the Trig DAQ.


NaI HpGe DFD to TDC Coin 3 4 2014 zoomed.png HpGe DFD to TDC Coin 3 4 2014 zoomed.png


NaI HpGe AMP2 Coin 3 4 2014.png

NaI HpGe RAW Coin.png


Bad.png

NaI HpGe AMP Coin 3 4 2014.png


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