CH HPGe Electronics Chain
Summer 2022 Efficiency Measuremets
1. Output 1 of HPGe → fan in/out
2A. 1st fan in/out output → spec amp
3A. Spec amp output → ADC input
2B. 2nd fan in/out output → timing filter amp
3B. Timing filter amp output → discriminator input
4B. Discriminator output → negative input of gate/delay generator 1 & → negative input of gate/delay generator 2
5B. Negative output of gate/delay generator 1 → ADC Gate
5C. Negative output of gate/delay generator 2 → Readout card port 1
Discriminator Settings
Note that when using a timing filter amp, the effective level of discrimination is adjusted. The timing-filter amp used (table below) has a minimum amplification of ~2.3x. To keep things consistent with using the unaltered pre-amp signal from the HPGe detector, the threshold is divided by the gain set by the timing filter amp and will be referred to as the Effective Threshold.
| Discriminator Threshold (mV) | Gain | Effective Threshold (mV) |
|---|---|---|
| 30.2 | N/A | 30.2 |
| 30.2 | ~2.4 | 12.58 |
| 30.4 | ~2.8 | 10.86 |
List of Modules
| Module | Brand | Model Number |
|---|---|---|
| Fan in/out | CAEN | N625 |
| Spec-Amp | Ortec | 672 |
| ADC | CAEN | V785N |
| Timing Filter Amp | Ortec | 474 |
| Discriminator | LeCroy | 821 |
| Gate & Delay Generator 1 | Ortec | 416 |
| Gate & Delay Generator 2 | Ortec | 416 |
| Readout Controller | SIS GmbH | SIS3820 |
Past
HPGe → Split signal using BNC T junction
→ First line to spec amp -> peak sensing ADC
→ Second line to timing/filter amp with ~2.3x amplification (also inverts)
→ Discriminator (Blue lecroy model #xxxx)
→ Top of dual timer then into bottom of dual timer
→ Into 1st gate and delay generator
--> positive sent to second gate and delay module
--> negative sent to PADC as gate for spec amp signal
→ 2nd gate and delay generator used for ROC signal