LVDS
Qweak LVDS input Lines for DAQ CAEN module V1495 with two A395A mezzanine boards
GEM detector #1 32 pin cable to the CAEN V1495 module
| Pins | Label | Description |
|---|---|---|
| 1,2 | MC | Master Clock 40 MHz synced to RF |
| 3,4 | T1G1 | Trigger input to "latch" GEM #1's output for readout |
| 5,6 | DoG1a | Data OUTPUT line from Gem #1 Card "a" |
| 7,8 | DvG1a | Data VALID line from Gem #1 Card "a" |
| 9,10 | DoG1b | Data line from Gem #1 Card "b" |
| 11,12 | DvG1b | Data line from Gem #1 Card "b" |
| 13,14 | DoG1c | Data OUTPUT line from Gem #1 Card c |
| 15,16 | DvG1c | Data VALID line from Gem #1 Card c |
| 17,18 | DoG1d | Data OUTPUT line from Gem #1 Card d |
| 19,20 | DvG1d | Data VALID line from Gem #1 Card d |
| 21,22 | DoG1e | Data OUTPUT line from Gem #1 Card e |
| 23,24 | DvG1e | Data VALID line from Gem #1 Card e |
| 25,26 | DoG1f | OUTPUT Data line from Gem #1 Card f |
| 27,28 | DvG1f | DataVALID line from Gem #1 Card f |
GEM detector #1 32 pin cable to the CAEN V1495 module
| Pins | Label | Description |
|---|---|---|
| 1,2 | MC | Master Clock 40 MHz synced to RF |
| 3,4 | T1G2 | Trigger input to "latch" GEM #2's output for readout |
| 5,6 | DoG2a | Data OUTPUT line from Gem #2 Card "a" |
| 7,8 | DvG2a | Data VALID line from Gem #2 Card "a" |
| 9,10 | DoG2b | Data line from Gem #2 Card "b" |
| 11,12 | DvG2b | Data line from Gem #2 Card "b" |
| 13,14 | DoG2c | Data OUTPUT line from Gem #2 Card c |
| 15,16 | DvG2c | Data VALID line from Gem #2 Card c |
| 17,18 | DoG2d | Data OUTPUT line from Gem #2 Card d |
| 19,20 | DvG2d | Data VALID line from Gem #2 Card d |
| 21,22 | Do2e | Data OUTPUT line from Gem #2 Card e |
| 23,24 | DvG2e | Data VALID line from Gem #2 Card e |
| 25,26 | DoG2f | OUTPUT Data line from Gem #2 Card f |
| 27,28 | DvG2f | DataVALID line from Gem #2 Card f |