Difference between revisions of "TF EIM Chapt5"

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Then you dope the crystal with impurities (Phosphorus) such that a thin n-type layer is formed, by diffusion, in the middle of the p-type crystal.
 
Then you dope the crystal with impurities (Phosphorus) such that a thin n-type layer is formed, by diffusion, in the middle of the p-type crystal.
  
You then need to treat the top layer with dopant again to overcoming the n-type characteristics which are left over from forming the n-type base in the middle of the device AND create more holes with larger dopant than the collector.  This step will directly influence the gain(<math>\alpha</math> and <math>\beta</math>) of the transistor.  The "+" label in the image below indicates that is is more p-type than the collector.
+
You then need to treat the top layer with dopant again to overcoming the n-type characteristics which are left over from forming the n-type base in the middle of the device AND create more holes with larger dopant than the collector.  This step will directly influence the gain(<math>\alpha</math> and <math>\beta</math>) of the transistor.  The "+" label in the image below indicates that it is more p-type than the collector.
  
 
The critical feature of the process is to establish abrupt changes in the doping which create sharp boundaries.  
 
The critical feature of the process is to establish abrupt changes in the doping which create sharp boundaries.  

Revision as of 20:45, 8 March 2011

Bipolar Transistor

The Bipolar transistor concept

From the last chapter we saw a p-n junction diode which had similar characteristic current-vs- voltage responses when biased either in the forward direction or backward.


TF EIM Diode V-vs-I curve.jpg


TF EIM ForwardBiased bottomhalfBipolar.jpg
The n-p junction. The depletion region is represented as the shaded square The potential
TF EIM ReverseBiased tophalfBipolar.jpg
The n-p junction. The depletion region is represented as the shaded square. Notice the depletion region (and E-field in that region) is larger than the forward biased n-p juntion the potential
TF EIM BipolarJunction.pngTF EIM pnpBipTran.png TF EIM BipolarJunctionDiodeRep.png TF EIM BipolarJunctionCircuit.png
The n-p junction. The depletion region is represented as the shaded square. Notice the depletion region (and E-field in that region) is larger than the forward biased n-p juntion the potential

The bottom p-n junction, when forward biased, provides a large current with a small voltage bias.

The top half of the p-n-p transistor is reversed biased, providing a "throttle" for the large current from the lower half.

The electric field points to the "collector" in the depletion region enlarged by the reverse bias. This moves the majority charge carriers away from the collector-base junction. Once outside the depletion zone, the charge carriers rely on diffusion to escape the material.

Bipolar transistor currents

Conservation of Current
[math]\Rightarrow I_E = I_B + I_C[/math]

Here it is the case that the positive current is actually representing the flow of positively charged holes (in non-semi-conductors the current represent the opposite direction of the flowing electrons)


You might think that the base current is larger than the collector current because of the reverse bias on the collector which leads to the base having lower resistance than the collector.

The above is not the case.


The potential [math]V_{BE}[/math] continuously draws electrons out of the emitter thus creating holes in the emitter. These holes diffuse into the base and are in a free-field region until they reach the depletion region between the collector and base.

While in the free-field region of the base they can do one of three things

  1. diffuse to the depletion region where they see the electric field and get swept into the collector.
  2. recombine with the mobile electrons in the base (the base is n-type material so electrons are the majority charge carriers)
  3. re-combine with electrons injected by [math] V_{BE}[/math] into the base through the resistor [math]R_{BE}[/math]


Usually the last two processes are more likely.

BUT if you make the emitter thin enough (less than the mean free path of the holes) then you can have the first process dominate such that most of the holes get swept into the collector before they get a chance to recombine.


As a result a large fraction of the current into the emitter ([math]\alpha \sim -.99[/math]) goes into the collector. ([math]I_C = \alpha I_E[/math])


returning to conservation of current

[math]I_E = I_B + I_C[/math]
[math]\left ( \frac{I_C}{\alpha}\right )= I_B + I_C[/math]
[math]\Rightarrow I_B = \frac{1-\alpha}{\alpha} I_C = ( 1- \alpha) I_E[/math]
[math]\Rightarrow I_B \lt \lt I_C \approx I_E[/math]

So small changes in [math]I_B[/math] produce large changes in [math]I_C[/math] (You can control a large current[math] I_C[/math] using a small current [math]I_B[/math])

This is an amplifier!
If you inject a signal into the base then the small changes in the base current will result in large changes in the collector current.
[math]\frac{I_{out}}{I_{in}} = \frac{I_C}{I_B} = \frac{\alpha}{1-\alpha} \equiv h_{FE}[/math]

Making a Transistor

As described above, the p-n-p junction is formed by "sandwiching" a thin n-type semicondor with 2 p-type semi-conductors.

The term "sandwiching" is in quotes because you DON'T glue 3 semiconductors together.

vertical diffuse planar transistor

Instead you start with a pure crystal of silicon that has been doped to to form the type os semi-conductor you wish to have as the COLLECTOR.

For now let's assume p-type, this means you dope pure silicon with boron. The collector is big (thick) because it has a lot of heat to dissipate.

Then you dope the crystal with impurities (Phosphorus) such that a thin n-type layer is formed, by diffusion, in the middle of the p-type crystal.

You then need to treat the top layer with dopant again to overcoming the n-type characteristics which are left over from forming the n-type base in the middle of the device AND create more holes with larger dopant than the collector. This step will directly influence the gain([math]\alpha[/math] and [math]\beta[/math]) of the transistor. The "+" label in the image below indicates that it is more p-type than the collector.

The critical feature of the process is to establish abrupt changes in the doping which create sharp boundaries.

You then coat the collector side with a conductor like metallic aluminum.

On the side used to transport dopant you need to construct contacts for the base and emitter. To do this you need an insulation layer and a conductor layer which passes through the insulation and makes contact with the base and emitter material. You use a stencil to deposit an insulating layer of SiO2 which will have holes that leave the base and emitter semiconductor material exposed. Then you deposit metallic aluminum conductor into the holes.

BipolarTransistor vertical diffuse planar.gif

Epitaxial growth

The epitaxial method to create transistors is a layer-by-layer construction method in which the crystal is actually "grown" by depositing layers onto a subtrate.


There are three general methods of growing a crystal.

  1. Vapor-phase Epitaxy: Most common way to grow silicon. A gas like silicon tetrachloride is mixed with hydrogen. The final state of the reaction has a pure silicon silicon wafer forming and a hydrogen chloride byproduct. If the hydrogen chloride is to dense you can get some etching. The growth rate ( 2 microns/min) is known and controllable, in some cases reversible. Dopants are added to the gas for the desired semiconductor type.
  2. Liquid phase Epitaxy: the semiconductor ( pure or a mixture of two) is melted and grown onto a substrate by cooling at a rate of 0.1 to 1 micron/minute. Dopants are mixed into the liquid state semiconductor. Used mostly for making compound semiconductors.
  3. Solid Phase Epitaxy: A substrate is deposited with material. The crystal is formed by heating the solid then ions are implanted onto the crystal. The method is mostly for healing crystal damage.

Base-Emmiter-Collector

Testing for pnp or npn

You can use an Ohmmeter to tell if a transistor is pnp or npn.

Generally the base is the middle of the three pins for a bi-polar transistor.

If you put the voltmeters positive probe on the emitter lead and the ground probe onto the base lead, then a pnp transistor will yield a low resistance (1- 10 [math]\Omega[/math]s).

If it is a npn transistor then the positive probe on the base and the ground on the emitter will yield the small resistance.

So it you know which leads are emitter and base you can determine transistor type.

If you know transistor type, you can determine which lead is the emitter.


You can test if the transistor is good or not using the table below with the Ohmeter set on the 1[math] \Omega[/math] range.


type [math]R_{BE}[/math] [math]R_{EB}[/math] [math]R_{BC}[/math] [math]R_{CB}[/math] [math]R_{CE}[/math] [math]R_{EC}[/math]
pnp high low high low high high
npn low high low high high high


Forest_Electronic_Instrumentation_and_Measurement