Difference between revisions of "HRRLrun 3-22-26-2010"
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Install all detectors and associated electronics (power supplies, cabling, gas lines,...) | Install all detectors and associated electronics (power supplies, cabling, gas lines,...) | ||
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+ | ==Timing concept== | ||
+ | |||
+ | There are 3 modules to be readout; an ADC, a TDC, and the V1495. | ||
+ | |||
+ | The ADC requires a gate defining the integration interval of the pulse. The TDC requires a start pulse to begin the TDC clock and a stop pulse to stop the TDC clock. The V1495 requires a trigger pulse to tell it there is data coming from the VFATs. | ||
+ | |||
+ | The ADC and TDC will be run so they get pulses every time there is a RF pulse. The data are only recorded though if there is a coincidence pulse telling them to keep the data. Otherewise the ADC and TDC will throw the data away. | ||
=3/19/10= | =3/19/10= |
Revision as of 22:56, 20 March 2010
HRRL run on March 22-26 2010
Preliminary setup
3/17/10
Install detector infrastructure to mount 2 Drift chambers, 2 Scintillators and 1 GEM on a translator table.
Install collimation
3/18/10
Install all detectors and associated electronics (power supplies, cabling, gas lines,...)
Timing concept
There are 3 modules to be readout; an ADC, a TDC, and the V1495.
The ADC requires a gate defining the integration interval of the pulse. The TDC requires a start pulse to begin the TDC clock and a stop pulse to stop the TDC clock. The V1495 requires a trigger pulse to tell it there is data coming from the VFATs.
The ADC and TDC will be run so they get pulses every time there is a RF pulse. The data are only recorded though if there is a coincidence pulse telling them to keep the data. Otherewise the ADC and TDC will throw the data away.
3/19/10
install DAQ system and associated readout electronics.
Check channels in histograms
Coincidence: Coincidence between Accelerator's RF pulse generator, and several PMTs
TDC start: Accelerator RF pulse generator. TDC stop: 2 DC, 1 GEM trigout, 4 PMTs
ADC: all FC channels from Accelerator ribbon cable. ADC gate: Create timing gate using scope when accelerator
V1495: Trigger pulse from coincidence logic above
3/22/10
Final day for completing system checks
3/23/10
1pm - 5pm: Tune beam for low and high current