Difference between revisions of "VFAT powered on and responding to I2C"

Revision as of 21:36, 20 June 2007

These are pictures of i2c operations with the VFAT board. In this example the VFAT is set to addresses 0x40 o 0x4F.

One byte of the VFAT ChipID is read from address 0x48. The result is F3.

The IPreampIn byte at address 0x42 is set to 0x18.

The IPreampIn byte that was just set is read. The address is 0x42 and the data is 0x18.

@@ Line 1: / Line 1: @@
-[[Image:i2c_scope_write_42.png]]
+These are pictures of i2c operations with the VFAT board. In this example the VFAT is set to addresses 0x40 o 0x4F.
-[[Image:i2c_scope_read_42.png]]
 [[Image:i2c_scope_read_48.png]]
+One byte of the VFAT ChipID is read from address 0x48. The result is F3.
-This is a picture of an i2c read operation on the VFAT board.
+[[Image:i2c_scope_write_42.png]]
-The controller starts communication with the device by giving a start signal and then the adress, which is 0x48 and corresponds to the first part of the ChipID. The chip then responds with the return byte, which is 0xF3 for this particular device. Finally the controll
+The IPreampIn byte at address 0x42 is set to 0x18.
-The VFAT is on addresses 0x40 thru 0x48. This trace is reading address 0x48, which is the first part of the ChipID. This value is F3 for this chip.
+[[Image:i2c_scope_read_42.png]]
+The IPreampIn byte that was just set is read. The address is 0x42 and the data is 0x18.