Difference between revisions of "LVDS"

From New IAC Wiki
Jump to navigation Jump to search
 
(5 intermediate revisions by the same user not shown)
Line 1: Line 1:
 
= Qweak LVDS input Lines for DAQ CAEN module V1495 with two A395A mezzanine boards=
 
= Qweak LVDS input Lines for DAQ CAEN module V1495 with two A395A mezzanine boards=
−
== GEM detector #1 32 pin cable to the CAEN V1495 module==
+
 
 +
http://www.caen.it/nuclear/product.php?mod=V1495
 +
 
 +
Connector type Robinson Nugent P50E-068-P1-SR1-TG <br/>
 +
A socket for the LVDS cable is the [http://www.erni.com/lpv.htd?gID=81352013 ERNI 073036]
 +
 
 +
== GEM detector #1 34 pin cable to the CAEN V1495 module==
 
{| border="5"
 
{| border="5"
 
! Pins || Label || Description
 
! Pins || Label || Description
Line 8: Line 14:
 
| 3,4 || T1G1 || Trigger input to "latch" GEM #1's output for readout
 
| 3,4 || T1G1 || Trigger input to "latch" GEM #1's output for readout
 
|-  
 
|-  
−
| 5,6  || DoG1a || Data OUTPUT line from Gem #1 Card "a"
+
| 5,6  || DoG1a || Data OUTPUT line from Gem #1 Card a
 
|-  
 
|-  
−
| 7,8  || DvG1a  ||Data VALID line from Gem #1 Card "a"
+
| 7,8  || DvG1a  ||Data VALID line from Gem #1 Card a
 
|-  
 
|-  
−
| 9,10  || DoG1b || Data line from Gem #1 Card "b"
+
| 9,10  || DoG1b || Data OUTPUT line from Gem #1 Card b
 
|-  
 
|-  
−
| 11,12  || DvG1b  ||Data line from Gem #1 Card "b"
+
| 11,12  || DvG1b  || Data VALID line from Gem #1 Card b
 
|-  
 
|-  
 
| 13,14  || DoG1c || Data OUTPUT line from Gem #1 Card c  
 
| 13,14  || DoG1c || Data OUTPUT line from Gem #1 Card c  
Line 28: Line 34:
 
| 23,24  || DvG1e  ||Data VALID line from Gem #1 Card e  
 
| 23,24  || DvG1e  ||Data VALID line from Gem #1 Card e  
 
|-  
 
|-  
−
| 25,26  || DoG1f || OUTPUT Data line from Gem #1 Card f  
+
| 25,26  || DoG1f || Data OUTPUT line from Gem #1 Card f  
 
|-  
 
|-  
−
| 27,28  || DvG1f  ||DataVALID line from Gem #1 Card f  
+
| 27,28  || DvG1f  ||Data VALID line from Gem #1 Card f  
 
|-
 
|-
 
|}
 
|}
  
−
== GEM detector #1 32 pin cable to the CAEN V1495 module==
+
== GEM detector #1 34 pin cable to the CAEN V1495 module==
  
 
{| border="5"
 
{| border="5"
Line 43: Line 49:
 
| 3,4 || T1G2 || Trigger input to "latch" GEM #2's output for readout
 
| 3,4 || T1G2 || Trigger input to "latch" GEM #2's output for readout
 
|-  
 
|-  
−
| 5,6  || DoG2a || Data OUTPUT line from Gem #2 Card "a"
+
| 5,6  || DoG2a || Data OUTPUT line from Gem #2 Card a
 
|-  
 
|-  
−
| 7,8  || DvG2a  ||Data VALID line from Gem #2 Card "a"
+
| 7,8  || DvG2a  ||Data VALID line from Gem #2 Card a
 
|-  
 
|-  
−
| 9,10  || DoG2b || Data line from Gem #2 Card "b"
+
| 9,10  || DoG2b || Data OUTPUT line from Gem #2 Card b
 
|-  
 
|-  
−
| 11,12  || DvG2b  ||Data line from Gem #2 Card "b"
+
| 11,12  || DvG2b  ||Data VALID line from Gem #2 Card b
 
|-  
 
|-  
 
| 13,14  || DoG2c || Data OUTPUT line from Gem #2 Card c  
 
| 13,14  || DoG2c || Data OUTPUT line from Gem #2 Card c  
Line 63: Line 69:
 
| 23,24  || DvG2e  ||Data VALID line from Gem #2 Card e  
 
| 23,24  || DvG2e  ||Data VALID line from Gem #2 Card e  
 
|-  
 
|-  
−
| 25,26  || DoG2f || OUTPUT  Data line from Gem #2 Card f  
+
| 25,26  || DoG2f || Data OUTPUT  Data line from Gem #2 Card f  
 
|-  
 
|-  
−
| 27,28  || DvG2f  ||DataVALID line from Gem #2 Card f  
+
| 27,28  || DvG2f  ||Data VALID line from Gem #2 Card f  
 
|-  
 
|-  
 
|}
 
|}
 +
 +
[http://wiki.iac.isu.edu/index.php/VFAT_readout_electronics Go Back][[VFAT_readout_electronics]]

Latest revision as of 17:09, 7 March 2009

Qweak LVDS input Lines for DAQ CAEN module V1495 with two A395A mezzanine boards

http://www.caen.it/nuclear/product.php?mod=V1495

Connector type Robinson Nugent P50E-068-P1-SR1-TG
A socket for the LVDS cable is the ERNI 073036

GEM detector #1 34 pin cable to the CAEN V1495 module

Pins Label Description
1,2 MC Master Clock 40 MHz synced to RF
3,4 T1G1 Trigger input to "latch" GEM #1's output for readout
5,6 DoG1a Data OUTPUT line from Gem #1 Card a
7,8 DvG1a Data VALID line from Gem #1 Card a
9,10 DoG1b Data OUTPUT line from Gem #1 Card b
11,12 DvG1b Data VALID line from Gem #1 Card b
13,14 DoG1c Data OUTPUT line from Gem #1 Card c
15,16 DvG1c Data VALID line from Gem #1 Card c
17,18 DoG1d Data OUTPUT line from Gem #1 Card d
19,20 DvG1d Data VALID line from Gem #1 Card d
21,22 DoG1e Data OUTPUT line from Gem #1 Card e
23,24 DvG1e Data VALID line from Gem #1 Card e
25,26 DoG1f Data OUTPUT line from Gem #1 Card f
27,28 DvG1f Data VALID line from Gem #1 Card f

GEM detector #1 34 pin cable to the CAEN V1495 module

Pins Label Description
1,2 MC Master Clock 40 MHz synced to RF
3,4 T1G2 Trigger input to "latch" GEM #2's output for readout
5,6 DoG2a Data OUTPUT line from Gem #2 Card a
7,8 DvG2a Data VALID line from Gem #2 Card a
9,10 DoG2b Data OUTPUT line from Gem #2 Card b
11,12 DvG2b Data VALID line from Gem #2 Card b
13,14 DoG2c Data OUTPUT line from Gem #2 Card c
15,16 DvG2c Data VALID line from Gem #2 Card c
17,18 DoG2d Data OUTPUT line from Gem #2 Card d
19,20 DvG2d Data VALID line from Gem #2 Card d
21,22 Do2e Data OUTPUT line from Gem #2 Card e
23,24 DvG2e Data VALID line from Gem #2 Card e
25,26 DoG2f Data OUTPUT Data line from Gem #2 Card f
27,28 DvG2f Data VALID line from Gem #2 Card f

Go BackVFAT_readout_electronics

Retrieved from "https://wiki.iac.isu.edu/index.php?title=LVDS&oldid=18657"