Difference between revisions of "JLAB PLX LVDS"
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Revision as of 18:45, 16 January 2009
A VME Modules designed by Ed Jastrzembski at JLAB
Description:
This PLX board will be built on a Flex I/O format that Ed Jastrzembski developed many years ago. The VME (back end) manages the interface to the bus, and controls two front end 'ports' that can be input or output units.
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