TF EIM Chapt6 - Revision history

Foretony: /* Characteristic curve */

2011-04-06T15:00:38Z

Characteristic curve

2011-04-06T14:54:17Z

Characteristic curve

2011-04-06T05:42:58Z

Equivalent circuit

2011-04-06T05:39:11Z

Equivalent circuit

2011-04-06T05:38:29Z

Equivalent circuit

2011-04-06T05:35:45Z

2011-04-06T05:34:15Z

the JFET equivalent Circuit

2011-04-06T05:33:35Z

the JFET equivalent Circuit

2011-04-06T05:33:17Z

the JFET equivalent Circuit

2011-04-06T05:32:14Z

the JFET equivalent Circuit

← Older revision		Revision as of 15:00, 6 April 2011
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−	[[File:TF_EIM_JFET_Vgs-vs-Id.png \| ~~200~~ px]][[File:TF_EIM_JFET_Vds-vs-Id.png \| ~~200~~ px]]	+	[[File:TF_EIM_JFET_Vgs-vs-Id.png \| 300 px]][[File:TF_EIM_JFET_Vds-vs-Id.png \| 300 px]]

	= Equivalent circuit=		= Equivalent circuit=

← Older revision		Revision as of 14:54, 6 April 2011
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	The difference is that higher base current in the bi-polar transistor yields higher output currents whereas in the JFET you get higher output currents with the least negative gate bias (n-channel).		The difference is that higher base current in the bi-polar transistor yields higher output currents whereas in the JFET you get higher output currents with the least negative gate bias (n-channel).
		+
		+
		+	[[File:TF_EIM_JFET_Vgs-vs-Id.png \| 200 px]][[File:TF_EIM_JFET_Vds-vs-Id.png \| 200 px]]

	= Equivalent circuit=		= Equivalent circuit=

← Older revision		Revision as of 05:42, 6 April 2011
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		+	In the case of the common source JFET configuration
		+
		+	<math>I_{in} = I_G</math> , <math>I_{out} = I_D</math>

	==admittance==		==admittance==

@@ Line 139: / Line 139: @@
 You define the derivative in terms of "y-parameters" such that
-:<math>y_{is} \equiv \left ( \frac{\partial I_{in}}{\partial V_{in}} \right )</math>
+:<math>y_{is} \equiv \left ( \frac{\partial I_{in}}{\partial V_{in}} \right )</math> = input conductance
 : <math>y_{rs} \equiv  \left (  \frac{\partial I_{in}}{\partial V_{out}} \right )</math>

← Older revision		Revision as of 05:38, 6 April 2011
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	: <math>y_{fs} \equiv \left ( \frac{\partial I_{out}}{\partial V_{in}} \right )</math>		: <math>y_{fs} \equiv \left ( \frac{\partial I_{out}}{\partial V_{in}} \right )</math>

−	: <math>g_m y_{os} \equiv \left ( \frac{\partial I_{out}}{\partial V_{out}} \right )</math> = output conductance	+	: <math>g_m \equiv y_{os} \equiv \left ( \frac{\partial I_{out}}{\partial V_{out}} \right )</math> = output conductance

@@ Line 183: / Line 183: @@
 ===AC===
 [[File:TF_EIM_JFET_ACequivCircuit.png| 200 px]]
 =MOSFET=

@@ Line 169: / Line 169: @@
 == the JFET equivalent Circuit==
-Below is a common source JFET configuration.  The Gate and Drain have the Source line as a common reference.  This is analogous to the common emitter configuration discussed in the last chapter and using in [[Lab_13_TF_EIM]].
+Below is a common source JFET configuration.  The Gate and Drain have the Source line as a common reference.  This is analogous to the common emitter configuration discussed in the last chapter and using in [[Lab_14_TF_EIM]].
 [[File:TF_EIM_JFET_CommonSOurceCircuit.png| 200 px]]

← Older revision		Revision as of 05:32, 6 April 2011
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	== the JFET equivalent Circuit==		== the JFET equivalent Circuit==
		+
		+	Below is a common source JFET configuration. The Gate and Drain have the Source line as a common reference. This is analogous to the common emitter configuration discussed in the last chapter and using in Lab 14.

	[[File:TF_EIM_JFET_CommonSOurceCircuit.png\| 200 px]]		[[File:TF_EIM_JFET_CommonSOurceCircuit.png\| 200 px]]