Introduction - Revision history

Oborn: /* Readout Controller (ROC) */

2010-04-12T22:35:12Z

Readout Controller (ROC)

Oborn: /* Purpose and Scope */

2010-04-12T22:34:40Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-12T22:34:18Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-09T02:41:18Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-09T02:32:20Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-09T02:28:38Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-09T02:28:14Z

Purpose and Scope

Oborn: /* Purpose and Scope */

2010-04-09T02:25:48Z

Purpose and Scope

Oborn at 17:45, 8 April 2010

2010-04-08T17:45:47Z

Oborn at 03:25, 28 March 2010

2010-03-28T03:25:42Z

← Older revision		Revision as of 22:35, 12 April 2010
Line 32:		Line 32:

	===Readout Controller (ROC)===		===Readout Controller (ROC)===
		+
		+
		+	[[Warren_Parsons_MS_Thesis]]

@@ Line 12: / Line 12: @@
 The digital output of several VFAT cards is recorded using the V1495 VME module built by CAEN which operates on the VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA).  The first FPGA is programmable by the user and is used as the main interface to the external I/Os on the faceplate of the V1495  The second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operate, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.
-Where necessary this thesis will reference and attempt to explain other portions from various manuals. For the user firmware and the ROC (Read Out Controller) portions of the detector, UML diagrams have been included to simplify the process of familiarizing the reader with this detector and its respective data acquisition algorithms for the VFATs. Unfortunately, due to the finite nature of this thesis there are many assumptions that are made about the level of technical proficiency of the reader; hopefully, these are minimal, but certainly they are unavoidable.
+Where necessary, this thesis will reference and attempt to explain other portions from various manuals. For the user firmware and the ROC (Read Out Controller) portions of the detector, UML diagrams have been included to simplify the process of familiarizing the reader with this detector and its respective data acquisition algorithms for the VFATs. Unfortunately, due to the finite nature of this thesis there are many assumptions that are made about the level of technical proficiency of the reader; hopefully, these are minimal, but certainly they are unavoidable.
 The main portion of this thesis begins where the analog voltage signals exit the GEM detectors and ends where the data are sent from the ROC to a host computer . Many of the topics for which discussion is necessary to understand the full scope of this project will be briefly touched upon in this introduction.

@@ Line 8: / Line 8: @@
 This thesis describes a system capable of digitally recording the analog charge deposited on
-position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons from the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing pre-amplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after the accumulated charge passes through these pre-amplifiers and pulse-shaping networks. These ICs were developed by the European Center for Nuclear Research (CERN) and have the ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using an I2C interface.
+position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons in the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing pre-amplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after the accumulated charge passes through these pre-amplifiers and pulse-shaping networks. These ICs were developed by the European Center for Nuclear Research (CERN) and have the ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using an I2C interface.
 The digital output of several VFAT cards is recorded using the V1495 VME module built by CAEN which operates on the VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA).  The first FPGA is programmable by the user and is used as the main interface to the external I/Os on the faceplate of the V1495  The second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operate, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.

@@ Line 8: / Line 8: @@
 This thesis describes a system capable of digitally recording the analog charge deposited on
-position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons from the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing preamplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after the accumulated charge passes through these preamplifiers and pulse-shaping networks. These ICs were developed by the European Center for Nulear Research (CERN) and havethe ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using its I2C interface.
+position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons from the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing pre-amplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after the accumulated charge passes through these pre-amplifiers and pulse-shaping networks. These ICs were developed by the European Center for Nuclear Research (CERN) and have the ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using an I2C interface.
-For the purpose of querying multiple VFAT cards simultaneously, it was necessary to use the V1495 module built by CAEN which operates on a VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA), the first FPGA is programmable by the user, and it used as the main interface to the external I/Os on the faceplate of the V1495, the second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operator, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.
+The digital output of several VFAT cards is recorded using the V1495 VME module built by CAEN which operates on the VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA).  The first FPGA is programmable by the user and is used as the main interface to the external I/Os on the faceplate of the V1495  The second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operate, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.
-Where necessary this thesis will reference and attempt to explain other portions from various manuals; all of these pertinent manuals are included on a CD with the original copy of this thesis. For the user firmware and the ROC (Read Out Controller) portions of the detector, UML diagrams have been included to simplify the process of familiarizing the reader with this detector and its respective algorithms for data acquisition from the VFATs. Unfortunately, due to the finite nature of this thesis there are many assumptions that are made about the level of technical proficiency of the reader; hopefully, these are minimal, but certainly they are unavoidable.
+Where necessary this thesis will reference and attempt to explain other portions from various manuals. For the user firmware and the ROC (Read Out Controller) portions of the detector, UML diagrams have been included to simplify the process of familiarizing the reader with this detector and its respective data acquisition algorithms for the VFATs. Unfortunately, due to the finite nature of this thesis there are many assumptions that are made about the level of technical proficiency of the reader; hopefully, these are minimal, but certainly they are unavoidable.
-The main portion of this thesis begins where the analog voltage signals exit the GEM detectors and ends where the hand off of data occurs at the Linux computer level. Many of the topics for which discussion is necessary to understand the full scope of this project will be briefly touched upon in this introduction.
+The main portion of this thesis begins where the analog voltage signals exit the GEM detectors and ends where the data are sent from the ROC to a host computer . Many of the topics for which discussion is necessary to understand the full scope of this project will be briefly touched upon in this introduction.
 ==Region 1 Detector Description==

@@ Line 8: / Line 8: @@
 This thesis describes a system capable of digitally recording the analog charge deposited on
-position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons from the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing preamplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after having passed through these preamplifiers and pulse-shaping networks. These fast-acting integrated circuits (ICs) developed by CERN each possess the ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using its I2C interface.
+position correlated charge collectors in the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Lab (JLab). Ionizing particles traversing the R1 detector liberate electrons from the chamber gas.  The free electrons are directed towards a charge collector by an applied external electric field.  A preamplifier within the detector, known as a Gas Electron Multiplier (insert Sauli reference),  will liberate about 100 electrons for every electron  which passes through the preamplifier region.  The GEM preamplifier uses the same avalanche principle which is the basis of a drift chamber detector.  The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing preamplifiers and pulse-shaping networks. A digital hit/no hit comparison is based on a programmable threshold voltage after the accumulated charge passes through these preamplifiers and pulse-shaping networks. These ICs were developed by the European Center for Nulear Research (CERN) and havethe ability to digitize the analog signal on 128 strips simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using its I2C interface.
 For the purpose of querying multiple VFAT cards simultaneously, it was necessary to use the V1495 module built by CAEN which operates on a VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA), the first FPGA is programmable by the user, and it used as the main interface to the external I/Os on the faceplate of the V1495, the second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operator, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.

@@ Line 7: / Line 7: @@
 ==Purpose and Scope==
-This thesis describes a system capable of digitally recording the charge content from the analog outputs of the Region 1 tracking system detectors used by the Qweak experiment at Jefferson Laboratories. High-energy, charged particle position information is made available by using a process known as Gas Electron Multiplication (GEM) whereby the original particle generates an avalanche of charged particles large enough to be detected by large-scale electronics. The final stage of this GEM detector contains analog voltage signals on individual copper strips. The analog signals on these individual strips are processed by a custom-made integrated circuit (IC) containing preamplifiers and pulse-shaping networks. A digital hit-or-miss comparison is based on a programmable threshold voltage after having passed through these preamplifiers and pulse-shaping networks. These fast-acting integrated circuits (ICs) developed by CERN each possess the ability to process 128 channels simultaneously. These cards will hereafter be referred to as VFAT cards.[1][2][3] The VFATs’ discriminators used to identify charge levels are also programmable via the VFATs’ registers. All of the programmable registers of the VFAT cards are accessed using its I2C interface.
+This thesis describes a system capable of digitally recording the analog charge deposited on
 For the purpose of querying multiple VFAT cards simultaneously, it was necessary to use the V1495 module built by CAEN which operates on a VME backplane.[4] The V1495 module contains two Field-Programmable Gate Arrays (FPGA), the first FPGA is programmable by the user, and it used as the main interface to the external I/Os on the faceplate of the V1495, the second FPGA controls the interfacing of the User FPGA and the VME backplane. Both FPGAs are members of the Cyclone device family.[5] The complete operation and underpinnings of the V1495 by itself are worthy of a separate thesis; the Cyclone Device Handbook, Volume 1, contains 385 pages. Of this, an understanding of perhaps 10 percent is sufficient to comprehend, operator, and effectively alter the properties of the Cyclone FPGA for the Region 1 detector.

@@ Line 15: / Line 15: @@
 The main portion of this thesis begins where the analog voltage signals exit the GEM detectors and ends where the hand off of data occurs at the Linux computer level. Many of the topics for which discussion is necessary to understand the full scope of this project will be briefly touched upon in this introduction.
-==Qweak Experiment at Jefferson Laboratories==
+==Region 1 Detector Description==
 ==VFAT2 Readout Card==
@@ Line 31: / Line 26: @@
 ===SRAM and Hit Report Database===
-==I2C Communication==
+===I2C Communication===
-==Data Acquisition Computer (DAQ)==
+===Gumstix Microcontroller===
-==CODA Readout==
+===Readout Controller (ROC)===

← Older revision		Revision as of 03:25, 28 March 2010
Line 1:		Line 1:
		+	[[Warren_Parsons_MS_Thesis]]
		+
	=Chapter 1=		=Chapter 1=